3A k a s h i S a t o h . A CompactRijndael Hardware Architecturewith S —Box Optimization[M].Springer-Verlag BerlinHeidelberg,2001.
4Issam Hammad, K am a 1 1 -Sankary,Ezz E1-Masr y. II igh-speed AES encry ptor withefficient merging tech niques[J].IEEE Embedded Systems,2010,2(3):67-71.
3Kubilay Atasu, Luca Breveglieri. Efficient AES implementations for ARM based platforms. 1515 Broadway, 17^th Floor Nev York, NY USA. 2004. page841-845.
4Hu Qin, Tsutomu Sasao. An FPGA design ofhES encryption circuit with 128-bit keys. 1515 Broadway, 17^th Floor New York, NY USA. 2005. page147-151.