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二进制翻译后端指令分级索引策略

Level Based Binary Translation System Back-end Instruction Indexing Strategy
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摘要 随着硬件平台的多元化,软件兼容性问题日益突出,二进制翻译技术是解决软件兼容性问题的重要手段.鉴于二进制翻译系统大部分执行时间消耗在后端指令的查找和执行过程中,高效的指令索引策略可以减少系统的指令查找开销,提高系统的整体效率.在对二进制翻译系统后端指令局部性特征进行统计分析的基础上,设计了一种能充分挖掘现代计算机系统硬件性能的二进制翻译指令分级索引策略.该策略结合二进制翻译系统后端指令特殊的局部性特征,使用针对性的替换算法对后端指令进行缓存,降低了系统的指令查找开销.在引入了LIIS索引策略后,开源二进制翻译系统QEMU的后端指令查找时间减少了70%,整个系统执行效率提高了15%. With the diversification of hardware platforms,software compatibility issues have become increasingly prominent.Binary translation system is the key technology to resolve this problem.Majority of the virtual machine execution time consumed in the process of finding and executing back-end instructions,so effective instruction indexing strategies can reduce the instruction addressing overhead and improve the overall efficiency of the system.Based on the statistical analysis of the back-end instruction locality,designed a level based virtual machine instruction indexing strategy w hich can fully exploit the capacity of modern computer hardw are.Based on the special locality of the virtual machine back-end instruction,this strategy uses targeted replacement algorithms to cache the back-end instructions,significantly reduces the overhead of the instruction addressing.With the help of LIIS,the back-end instruction addressing time of QEMU have been reduced by 70%,and the efficiency of full QEMU system have been improved by 15%.
出处 《小型微型计算机系统》 CSCD 北大核心 2013年第7期1498-1502,共5页 Journal of Chinese Computer Systems
基金 工信部科技重大专项项目(2009ZX01028-002-003)资助 国家自然科学基金项目(61033009)资助
关键词 虚拟机 指令索引 局部性 CACHE QEMU virtual machine instruction indexing locality cache QEMU
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  • 1Mataga T B P, Sagiv M. Edge Profiling Versus Path Profiling: The Showdown. In Proceedings of the 25th ACM SIGPLAN-SIGACT Symposium on Principles Programming Languages. San Diego, CA,1998:134- 148
  • 2Intel Corporation. IA-32 Intel Architecture Software Developer's Manual Volume 1: Basic Architecture, 2001
  • 3Ung D, Cifuentes C. Optimizing Hot Paths in a Dynamic Binary Translator. In Proceedings of the 2nd Workshop on Binary Translation,2000- 10
  • 4Zheng C, Thompson C. PA-RISC to IA-64: Transparent Execution,No Recompilation. IEEE Comput. Mag., 2000, 33(3): 47-52
  • 5Ebcioglu K. Dynamic Binary Translation and Optimization. IEEE Trans. on Computers, 2001, 50(6): 529-548
  • 6Michael Gschwind,et al.Dynamic and transparent binary translation[J].Computer,March 2000,IEEE Computer Society Press,2000,33 (3):54-59.
  • 7Anton Chernoff,Mark Herdeg,Ray Hookway,et al.FX1 32:A profile-directed binary translator[J].IEEE Micro(18),March/April,1998.
  • 8Baraz L,Devor T,Etzion O,et al.IA-32 execution layer:A two phase dynamic translator designed to support IA-32 applications on itanium(r)-based systems[C].In:Proc.36th Annu.Int.Symp.Microarchitecture,2005,191-204.
  • 9Calder B,Feller P,Eustace A.Value profiling[C].In 30th Annual International Symposium on Microarchitecture,December 1997,259-269.
  • 10Watterson S,Debray S.Goal-directed value profiling proc[C].Compiler Construction,2001.

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