摘要
速率匹配是LTE系统中重要的组成部分。在详细分析3GPP协议中Turbo编码速率匹配算法的基础上,给出了一种基于FPGA的速率匹配实现方案。该方案通过乒乓操作以减少速率匹配的处理延时;并以Virtex-6芯片为平台,完成了仿真、综合、板级验证等工作。结果表明,基于该方案的速率匹配算法能够明显地缩小处理延迟。
Rate matching is one of the most important parts in TD_LTE system. Based on intensive research of Turbo code rate matching algorithm of 3GPP protocol ,an implementation scheme is proposed based on FPGA rate matching.The scheme runs the ping-pong operation to reduce rate matching processing delay.And with Virtex-6 chip as a platform,it completes the simula- tion,comprehensive and board level verification,etc.The experimental results show that the program based on the rate matching al- gorithln can obviously reduce processing delay.
出处
《电子技术应用》
北大核心
2013年第7期14-16,20,共4页
Application of Electronic Technique
基金
国家科技重大专项(2011ZX03001-002)