摘要
针对模拟滤波器设计灵活性差且不能很好地支持数据通信的并行和速度等问题,利用Altera公司CycloneII系列中的EP2C35F672C6N芯片完成了基于FPGA的WSN信道波形整形滤波器的设计。通过功能创建、计算查表法系数、建立内存数据表、Verilog-HDL编程、Quartus-II平台下进行FPGA综合、ModelSim时序仿真、DE2开发板下载调试等过程,实现了波形整形硬件平台通过USB接口与主机的通信。测试结果表明,该波形整形滤波器具有低成本、频率可扩展、即插即用等优点,使用方便。
For analog filter design has poor flexibility and can not be a good solution to support data parallelism and speed, this paper uses the Altera CycloneII series of EP2C35F672C6N chip to complete the WSN channel pulse shaping filter based on FPGA. Through the function to create the table look-up method, calculation of coefficient, establish memory data table, Veilog- HDL programming, Quartus-II platform under FPGA, ModelSim timing simulation, DE2 development board download debugging pro- cess, it realizes the waveshaping hardware platform communicate with mainframe through USB interface. The test results show that the waveshaping filter has advantages of a low cost, scalable frequency, plug and play, etc., and it's easy to use.
出处
《电子技术应用》
北大核心
2013年第7期35-37,共3页
Application of Electronic Technique
基金
国家自然科学基金(61204127)
黑龙江省教育厅科研项目(12521604)
齐齐哈尔市科技局工业攻关项目(GYGG-201109)