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基于移动设备的D类放大器前置放大器的设计 被引量:1

Design of Preamplifier of Class D Audio Power Amplifier Based on Mobile Devices
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摘要 基于SMIC 0.18μm工艺,设计了一款低功耗、低噪声的D类前置放大器。通过对常用运放的结构进行比较,选择了一种开关电容共模反馈电路的两级运放,并加入斩波结构降低噪声。用Cadence/Spectre仿真器进行仿真,仿真结果表明,该全差分运放的直流开环增益为65 dB,单位增益带宽为259.7 MHz,相位裕度为70°,转换速率为98 V/μs,静态功耗为1 mW。适合于现代的便携产品应用中。 A low power and low noise preamplifier of class D power amplifier based on the SMIC 0. 18 μm process is presented. By comparing basic operational amplifier, a two -stage operational amplifier with a switched capacitor common mode feedback circuit is chosen, and chopper structure is used to reduce the noise. The simulation results in Cadence/Spectre show that the fully - differential operational amplifier open - loop DC gain is 65 dB, the unity - gain bandwidth is 259. 7 MHz, the phase margin is 70°, the slew rate is 98 V/p.s, and the static power consumption is 1 mW. It' s suitable for modern portable products.
出处 《电声技术》 2013年第6期35-37,41,共4页 Audio Engineering
关键词 低噪声 低功耗 斩波 全差分 low noise lowpower chopper fully - differential
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参考文献8

  • 1MESSGHATI Z, LAGHZIZAL Y. Pulse width modulation for class D audio power amplifier in CMOS O. 18um Process with 85% of efficiency [ C ]//IEEE Communication, Computing and Control Application. [ S. 1. ] :IEEE Press,2011:1 -4.
  • 2XU Yong, ZHAO Fei, WU Yuanliang, et al. Single chip de- sign of closed - loop class D audio power amplifier [ C ]// IEEE, Wireless Communication and Signal Processing. FS. 1. 1 ,IEEE Press.2010:l -5.
  • 3Allen P E,Holberg D R(著).CMOS模拟集成电路设计[M].冯军,李智群(译).北京:电子工业出版社,2005.
  • 4拉扎维.模拟CMOS集成电路设计[M].陈贵灿,译.西安:西安交通大学出版社,2003.
  • 5GRAY P R,HURST P J, LEWIS S H.模拟集成电路分析与设计[M].张晓林,译.4版.北京:高等教育出版社,2005.
  • 6黄武康,周长胜,袁国顺,赵海亮.2.5W低噪声CMOSD类音频功放设计[J].固体电子学研究与进展,2010,30(1):108-113. 被引量:4
  • 7赵海亮,刘诺,周长胜.D类功放中输入斩波运放电路的设计[J].半导体技术,2008,33(6):520-523. 被引量:3
  • 8Johns D A,Martin K.模拟集成电路设计[M].曾朝阳[译].北京:机械工业出版社,2005.

二级参考文献11

  • 1杨银堂,贺斌,朱樟明.CMOS斩波稳定放大器的分析与研究[J].电子器件,2005,28(1):167-171. 被引量:14
  • 2Huey Chian Foong, Meng Tong Tan. An analysis of THD in class D amplifiers [C]. IEEE Asia Pacific Conference on Circuits and Systems Proceedings, Singapore, 2006: 724-727.
  • 3Salahddine Krit, Hassan Qjidaa. Class D audio amplifier with trim-able ramp generator design theory and design implementation for portable applications [C]. International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Rabat, Morocco, 2007: 208-212.
  • 4Pietro A dduci, Edoardo Botti. PWM power audio amplifier with voltage/current mixed feedback for high-efficiency speakers [J]. IEEE Trans on Industrial Electronics, 2007,54 (2):1141-1150.
  • 5Norsworthy S R, Schreier R, Temes G C. Delta-Sigma Data Converters: Theory, Design and Simulation [M]. New York: IEEE Circuits &-Systems Society, 1997:3-13.
  • 6Flynn M P, Lidholm S U. A 1.2-μm CMOS currentcontrolled oscillator [J]. IEEE Journal of Solid-state Circuits, 1992, 27(7): 982-987.
  • 7Jeong D K, Borriello G, Hodges D A, et al. Design of PLL-based clock generation circuits [J].IEEE Journal of Solid-state Circuits, 1987, 22 (2):255-261.
  • 8Chung Won-Sup, Kim Hoon, Cha Hyeong-Woo, et al. Triangular/square-wave generator with independently controllable frequency and amplitude [J]. IEEE Transaction on Instrumentation and Measurement, 2005, 54(1): 105-109.
  • 9FOONG H C, TAN M T. An analysis of THD in class D amplifiers[ C]//IEEE APCCAS. Singapore ,2006,724-727.
  • 10.ALLEN P E,HOLBERG D R.CMOS analog circuit design(Second Edition) [ M].北京:电子工业出版社,2002:336-339.

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