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莫尔条纹信号的数字锁相倍频系统 被引量:3

Digital Phase-locked Multiplier System of Moore Fringe Signal
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摘要 为实现对莫尔条纹信号的高倍动态细分,提出了莫尔条纹信号数字锁相倍频的细分方法,并设计了基于CPLD芯片的数字锁相倍频系统。该系统将莫尔条纹原始信号处理成方波信号,采用全数字倍频系统对其进行锁相倍频。首先利用鉴频/鉴相器对编码器信号进行鉴别,得到倍频控制字和相位差;然后将倍频控制字送入数控振荡器,实现对原始信号的高倍倍频,同时保证了新生倍频信号与原始信号的相位同步;最后将数控振荡器输出的倍频信号经过N分频,反馈回鉴频/鉴相器,并利用相位差进行相位调整。经过实验证明,系统成功实现了对编码器信号的32768倍的细分。倍频电路全部在CPLD芯片中编程实现,其动态特性好,提高了对编码器信号的跟随速度,避免了机械上对精码码道的刻画、电子学上对精粗码校正及A/D转换中量化等的误差;并且克服了传统模拟倍频方法的响应时间较长、易受温度和电网电压波动影响、存在直流零点漂移及部件饱和等缺欠。 To achieve high-power dynamic subdivision of the Moore fringe signal, this paper proposed a method of digital phase-locked multiplier subdivision of the Moore fringe, and designed a digital phase-locked multiplier system based on CPLD chip. The system changed original Moore fringes signal into a square wave signal and the multiplier system was all-digital phase- locked multiplier. It used frequency detector / phase detector to identify the encoder signals to get the octave control word and the phase difference. Then the multiplier control word was transmitted into the digitally controlled oscillator, to get high-power frequency multiplication of the original signal, and to ensure the newborn frequency signal phase synchronization of the original signal phase synchronization. The output frequency signal of the digitally controlled oscillator which through-N frequency was feeded back to fre- quency / phase detector,and adjust their phase with the phase difference. The experiments show that the system successfully a- chieves 32768 times subdivision of the encoder signal. Multiplier circuit all programmed in the CPLD chip, and its dynamic charac- teristic is good,improves the follow speed of the eneoder signals. It avoid the mechanical characterization of fine yards, the correc- tion code and the A / D converter quantization error on electronics. And it overcomes the traditional analog multiplier method has a longer response time, vulnerable to temperature and voltage fluctuations of power grid, existence of the other shortcomings as DC zero drift and component saturation.
出处 《仪表技术与传感器》 CSCD 北大核心 2013年第5期103-105,110,共4页 Instrument Technique and Sensor
关键词 编码器 锁相倍频细分 CPLD encoder phased-locked multiplier subdivision CPLD
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