摘要
研究电力线通信过程中采样同步效率的优化问题,提出一种计算同步位置的优化策略。首先根据直接同步方法设计先片后位算法,利用片内采样过程完成电力线信号采样,创新地利用片内高低电位的最大差异计算片内位移个数,主要采用高低电位相差数量的最大情况为理想片内同步结果。试验结果表明该算法可以提高40%的时间效率。
The optimization problem of sampling synchronization efficiency in the process of power line communication is studied in this paper. An optimization strategy of calculating the synchronous position is proposed. A bit algorithm after the first piece is designed in accordance with the direct synchronization algorithm. The power line sampling is fulfilled in the process of on-chip sampling. The innovation of this paper is to use the biggest difference between high and low potentials in chip to calcu-late the displacement number in the on-chip. The sliding window was designed to calculate the on-line maximum offset. The test results show that the algorithm can increase the time efficiency by a factor of 40%.
出处
《现代电子技术》
2013年第14期24-26,30,共4页
Modern Electronics Technique
关键词
电力线通信
扩频
同步算法
片同步
power line communication
spread spectrum
synchronization algorithm
chip synchronization