新型高线性度双平衡CMOS混频器芯片的设计

Design of Novel High-Linearity Double-Balanced CMOS Mixer

设计了一款用于无线通信射频系统的新型双平衡混频器芯片,该混频器的输出信号中不存在与射频输入信号相关的二次非理想项,具有高线性度.该混频器基于新型乘法器结构,在两个工作于线性区的对称金属氧化物半导体(MOS)晶体管的源、漏两极加入差分射频信号,在其栅极加入差分本振信号,从而以低复杂度方式实现射频信号与本振信号的双平衡混频或相乘;采用差分推挽放大器及源随器作为芯片的输出缓冲接口,改善了芯片与片外电路之间的隔离度,提高了功率增益和输出匹配性能.芯片采用0.18μm射频(RF)互补金属氧化物半导体(CMOS)工艺流片,实现超宽频带范围内的信号混频或相乘,1dB压缩点2.9dBm,三阶交调16 dBm,总功耗25 mW,芯片性能良好,可以满足高性能、超宽带、高速无线通信系统的要求.

Proposed in this paper is a novel high-linearity double-balanced mixer for wireless radio frequency （RF） systems, which outputs signals without RF signal-related second-order nonlinear term. In this mixer based on a novel multiplier structure, RF signals are sent to the source and the drain of two symmetrical MOS （ Metal Oxide Semicon- ductor） transistors in the linear region, and local oscillator （LO） signals are sent to the grid. Thus, the double- balanced mixing or multiplying of RF and LO signals are implemented with low complexity. Moreover, the differential push-pull amplifier and the source follower are used as the output buffer interfaces, thus improving the isolation between the mixer and the outside circuits, the power gain and the output matching ability. The proposed mixer is fabricated by 0.18 μm CMOS process and is used as a multiplier in ultra-wide band, with an input 1 dB compression point of 2.9 dBm, a third-order intermodulation of 16 dBm and a total power consumption of 25 roW. Test results demonstrate that the proposed mixer is of good performance and meets the requirements of high-performance and high-speed ultrawideband wireless comnmnication systems.