摘要
采用2片74LS190数字逻辑器件设计了两位数的分频器,给出了设计的原理图,接着使用Quartus-II工具软件进行分频器的功能仿真,结果表明该分频器能够对输入信号的频率实现1-99的分频,最后将编译好的文件下载到相应的CPLD器件中,从硬件电路上实现了可变分频器的设计.
Two 74LS190 digital logic devices are designed to be the double-digit divider and schematic design is shown.Then the Quartus-II software tools is used to get divider functional simulation and the simulation results show that the 1-99 sub-divider can be obtained.Finally,the compiled file is downloaded to the appropriate CPLD devices and achieve the design of the variable frequency divider based on hardware circuit.
出处
《曲靖师范学院学报》
2013年第3期48-50,共3页
Journal of Qujing Normal University
基金
曲靖师范学院校级实验项目"通信原理实验中的CPLD二次开发"(Syjx2011006)
关键词
电子信息
可变分频器
CPLD
数字电路
electronic information
variable frequency divider
CPLD
digital circuits