摘要
多周期路径是将复杂电路运算拆分在多个时钟周期完成,从而提高电路总体运行频率的一种设计方法,是数字电路中广泛使用的一种设计手段。实践中多周期路径的设计、约束与实现经常误用导致设计迭代和反复。文中结合在研项目,对多周期路径的产生机理进行了系统的分析,针对设计中常见的问题展开分析,提出了一种多周期路径的设计实现和施加约束的方法。实践结果表明,采用文中提供的方法可以有效避免多周期路径的误用,减少设计迭代,提高设计效率。
Multi-cycle path is the data path which needs multiple clock cycle to complete computation in the circuit. Multi-cycle path is widely used in digital integrated circuit design to improve the operating frequency of the circuit. However, it is frequently found design it- eration as the result of multi-cycle path being misused in design practice. By the research and analysis of multi-cycle path in IC design and problems often found during design process, a way of multi-cycle path implementing and constraint is presented. The result shows that this method avoids the misuse of multi-cycle path efficiently, improves design efficiency and shortens the whole design process.
出处
《计算机技术与发展》
2013年第8期204-206,211,共4页
Computer Technology and Development
基金
"十二五"微电子预研(51308010601)
总装预研基金(9140A08010712HK6101)
中国航空工业集团公司创新基金(2010BD63111)
关键词
多周期路径
数字集成电路
静态时序分析
时序电路
multi-cycle path
digital integrated circuit
static timing analysis
sequential circuit