摘要
可重构架构高效、灵活,能够满足嵌入式处理领域的高性能需求.通过对三种粗粒度与两种多粒度的典型可重构架构进行建模,将算法分类,并映射不同类型的算法到可重构架构上,从硬件利用率,计算时间,输入输出带宽,数据组织形式,数据复用率等五个方面进行分析,得到多粒度的可重构架构,配以灵活的互联能够更好地完成各类算法,但是总体的硬件利用率较低.而数据带宽仍然是可重构架构的瓶颈.为可重构架构设计提供理论依据.
Reconfigurable architectures,which are efficient and flexible,can meet the high performance needs of embedded processing field.This paper models three coarse-grained and two multi-grained typical reconfigurable architectures,then classifies algorithm and maps different types of algorithm on the reconfigurable architectures.Analysis has five parts: hardware utilization,computing time,input and output bandwidth,data arrangement and data reuse rate.Conclusion is that multi-grained reconfigurable architecture with flexible interconnect can perform different algorithms better,however,hardware utilization rate is a little lower.Data bandwidth is still the bottleneck of reconfigurable architectures.Provide theoretical basis for later design of reconfigurable architectures.
出处
《微电子学与计算机》
CSCD
北大核心
2013年第8期160-164,168,共6页
Microelectronics & Computer
关键词
可重构架构
粗粒度
多粒度
计算密集型
I/O密集型
算法映射
reconfigurable architecture
coarse-grained
multi-grained
CPU-bound
I/O-bound
algorithm mapping