低死时间单道脉冲幅度分析器的设计与仿真

Design and Simulation of Low Dead-Time Single Channel Analyzer

死时间是单道脉冲幅度分析器重要性能指标之一,特别是在高计数率条件下,该指标对单道系统的影响尤为明显。针对这一问题设计了一个单道电路,采用了新的逻辑控制电路设计思路,从很大程度降低了传统单道逻辑电路的死时间。用Multisim仿真软件对该电路进行仿真,仿真结果表明其在高频输入信号下工作状态良好。

Dead- time is one of important performance indexes of single channel pulse height analyzer（SCA）. Especially under high counting rate condition, its influence is obviously. Aiming at this problem, the paper presents a new logic control circuit design to decrease the dead - time of traditional single channel system. Through simulation by Multisim software, this circuit can work well under high frequency signal.