双时钟FIFO在多通道高速传输系统中的应用

Application of Dual-clock FIFO in the Multi-channel High Speed Transmission System

介绍了一种跨时钟域传递数据的双时钟FIFO模型,并给出了该模型使用状态信号rdusedw和wrusedw产生空、满状态标志信号的控制方法。利用双时钟FIFO设计了多通道高速传输接口电路,在QuartusII9.0软件开发平台上进行电路时序仿真。结果表明FIFO调度模块能够控制4对双时钟FIFO的数据流切换和分流,实现基于FPGA的主接收板与从发送板之间的高速数据通信。高速传输系统接口电路设计灵活,具有很好实用价值。

A dual- clock FIFO model with data transfers crossing different clock domains was introduced, and the control method about how the model used state signals rdusedw and wrusedw to produce state signals of emp- ty and full marks was given. The multi - channel high - speed transmission interface circuit was designed to use the dual- clock FIFO and its timing simulation was accomplished in the software development platform Quar- tusII9.0. The results show that the FIFO scheduling module can control the four pairs of dual - clock FIFO data stream switching and diversion, and achieve high - speed data communication between the main receiver board and the subordinate transmitter board based on FPGA. The design of the high - speed transmission system inter- face circuit is flexible and has good practical value.