摘要
结合TMS320DM6446平台硬件特性,完成D1分辨率AVS帧内预测算法实时实现。采用了单宏块双缓冲处理机制,实现EDMA传输与DSP处理AVS帧内模式选择并行完成。对耗时的残差运算和重构运算进行汇编级指令集优化,经过汇编级优化后,残差运算所需时钟周期数是只经过C语言级优化的6.03%;重构运算所需指令周期是只经过C语言级优化的4.43%。
Considering the structural characteristics of the hardware platform, AVS real-time encoding for D1 resolution is implemented based on TMS320DM6446 platform. The intra-frame predictive coding is completed in parallel with single macro-block double buffering mechanism for DSP process and EDMA transfer data. Assembly optimization for AVS residuals and reconstruction operations is implemented. The assembly optimized cycles required is about 6.03% of the original optimized by C code for residuals by CCS3.3 profile and it is about 4.43% for reconstruction.
出处
《科技情报开发与经济》
2013年第9期122-124,共3页
Sci-Tech Information Development & Economy
基金
国家自然科学基金资助项目(60772101)