摘要
为了满足对1553B协议处理器的特定需求,设计了BU-61580总线控制器IP核.运用专用芯片设计思想,描述了总体设计思路,在FPGA上采用模块化的方法进行逐步设计.为降低出错的可能性,首先对各子模块分别做验证,最后对整体逻辑进行测试.设计的IP核成本低,集成化程度高.通过大量仿真实验,结果表明IP核的功能符合设计要求.最后经过物理验证,正确实现各项功能,能满足特定场合的应用.
In order to meet the especial demand for 1553B protocol processor, this article design the bus controller IP core of BU-61580. Using the design idea of the special chip, The integrated design program is described with modularization designing method on the FPGA chip . Every module is proved for lessening the mistake rate, then testing the whole logic. The designed IP core has lower cost and has a higher level in integration. After large of simulation, the results indicate that the functions of IP core could fit the designing demand. Through physical testing at last, the IP core can achieve every function and could be applied in series of situation.
出处
《微电子学与计算机》
CSCD
北大核心
2013年第9期129-132,共4页
Microelectronics & Computer
基金
国家自然科学基金(61175029)
国防科技重点实验室基金(9140C610301080C6106
9140C6001070801)