用VHDL-AMS进行概念设计

VHDL-AMS in Conceptual Design

VHDL- AMS是 VHDL 向模拟和混合信号领域的扩展 .VHDL- AMS为设计者提供了在概念级处理复杂系统的能力 .随着 VHDL- AMS的标准化 ,将诞生处理复杂的模拟和混合信号模型的有效的模拟器 .文中介绍了VHDL- AMS模拟扩展的主要内容 ,展示了一个混合模式模拟环境 ,并给出了模拟解算器的构成 ,讨论了连续和离散模拟的同步问题 ;用 4个例子说明 VHDL -

VHDL AMS is an extension of VHDL to analog and mixed signal domain. VHDL AMS provides designers the ability to deal with complex system design at conceptual level.With the standardization of VHDL AMS,capable and effective simulators are in demand for exercising complex analog and mixed signal models. In the article the main concept of VHDL AMS in analog extension is introduced.A mixed mode simulation environment is presented. The main steps of the analog solver are described.The synchronization of continuous and discrete event simulation are discussed. Four examples indicate how VHDL AMS is used in conceptual design.