1YANG R J, CHAO K H, HWU S C, et al. A 155.52 Mbps-3.125 Gbps continuous-rate clock and data recovery circuit [J]. IEEE Journal of solid-state circuits, 2006,41 (6): 1380-1390.
2CHEN S, .AHMAD N N, HANZO L. Adaptive minimum bit-error rate beamforming [J]. IEEE Transactions on wireless communications, 2005,4 (2):341-348.