摘要
电路如果存在不稳定性因素,就有可能出现振荡。本文对比分析了传统LDO和无片电容LDO的零极点,运用电流缓冲器频率补偿设计了一款无片外电容LDO,电流缓冲器频率补偿不仅可减小片上补偿电容而且可以增加带宽。对理论分析结果在Cadence平台基上于CSMC0.5um工艺对电路进行了仿真验证。本文无片外电容LDO的片上补偿电容仅为3pF,减小了制造成本。它的电源电压为3.5~6 V,输出电压为3.5 V。当在输入电源电压6 V时输出电流从100μA到100mA变化时,最小相位裕度为830,最小带宽为4.58
If circuits suffer from instability,they may oscillate.The comparative analysis of the traditional LDO and outputcapacitorless LDO’s poles and zeros is presented in this article.An output-capacitorless LDO with current buffer compensation is designed.Current buffer compensation not only reduces the on-chip compensation chip but also increases bandwidth.Theoretical analysis of results is verified by simulations in the Cadence platform based on CSMC0.5um process.the The total on-chip capacitance is only 3 pF,so the manufacturing cost is reduced.Its supply voltage is 3.5~6 V and output voltage is 3.5 V.When the output current changes from 100 μA to 100 mA at supply voltage 6 V,the minimum phase margin is 830 and the minimum bandwidth is 4.58 MHz.
出处
《电子设计工程》
2013年第16期147-150,共4页
Electronic Design Engineering