一种强驱动大摆幅输出缓冲器的设计

本文采用0.35 CMOS工艺,设计了一种强驱动大摆幅的输出缓冲器,该电路用5V单电源供电,能保证输入共模范围和输出信号摆幅达到电源和地,实现输入输出的Rail_to_Rail。该缓冲器在负载电容为1,负载电阻为10kΩ时开环增益为74dB,单位增益带宽为3.5MHz,相位裕度为50°,系统失调仅有3mV,静态电流只有800,输出噪声为10。当用幅度为2V,频率为100kHz的正弦波做谐波分析时,在可接受的谐波失真范围内,负载电阻可降至300Ω。

In this paper, an output buffer with strong drive strength and wide swing has been designed with 0.35um CMOS technol-ogy. The circuit powered by 5V single power supply is able to ensure the input common mode range and output signal swing to power and ground and to achieve the Rail_to_Rail input and output. The buffer has achieved 74dB open-loop gain, 3.5MHz unity gain band-width, 50° phase margin, 3mV system disorders, 800uA quiescent current and 10 nV/ Hzoutput noise with 1nF load capacitor and 10kΩload resistor. When doing the harmonic analysis with 2V amplitude and 100 kHz frequency sine wave, the load resistor can be re-duced to 300Ω in an acceptable harmonic distortion range.