高性能VLSI输出驱动器的高速低耗设计研究

Optimal Drivers for High Performance VLSI System

研究了高性能超大规模集成电路 (VLSI)输出驱动器的高速低耗小芯片面积优化设计的基础理论 .基于CMOS晶体管的非线性I V特性 ,研究发展了关于VLSI输出驱动器在驱动大负载时的优化设计模型 .应用该设计模型和相应优化设计关系 ,经SPICE模拟实验 ,获得了较为满意的结果 ,与传统理论的设计结果比较 ,该设计模型和优化设计方法可明显提高输出驱动器的整体性能 。

The study is concerned with the optimal design of buffers in high performance VLSI systems. Based on the transistor’s nonlinear I?V characteristics, an analytic expression is derived to relate the parameters of signal delay, power dissipation, driver size, and interconnection load for VLSI system. An optimal design of buffers is thus made for high speed low power and minimal size ICs. The analytical model and parameter relationship are proved satisfactory by SPICE simulation.