基于FPGA双精度浮点运算器乘法模块的研究

A Study of of the Multiplication Modules in Float-Point Units with Double Precision Based on FPGA

该文主要研究基于FPGA双精度浮点运算器的乘法模块,该乘法模块被分解成更小的乘法模块,再把结果加在一起。双精度浮点乘法运算在Quartus II环境下做出仿真,并把所得到的符合IEEE754标准的结果运用C语言编写的程序进行验证。实验结果表明,双精度浮点乘法的程序是正确的。

This paper focuses on the multiplication modules of the floating-point units with double precision based on FPGA, and all the modules will be first decomposed into smaller parts, the results of which then be added up. The double precision floating-point multiplication is first simulated in the environment of Quartus Ⅱand then the simulation results which measure up to the standard of IEEE754 will then be verified by using the C programming language. The verification shows that the program of the double precision floating-point multiplication is correct and effective.