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基于FPGA的高速数字故障录波仪的设计

Design of High-speed Digital Fault Recorder Based on FPGA
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摘要 在分析数字信号处理(DSP)的浮点运算性能基础上,选用现场可编程门阵列(Field-programmable gate array,FPGA),依据其具备高速逻辑运算能力的优点,设计了一种高速数字化故障录波仪。实验表明,该设计提高了故障录波仪的故障记录、故障判别的正确性,并保证了装置运行的稳定性。 A high-speed digital fault recorder which is used in faster floating point performance of DSP and high-speed logic operation capabilities of FPGA is designed.The communication and acquisition function’ s software are realized by hardware,It can effectively improve the accuracy and process capability of data.The interconnection interface has high data transmission capacity with configures independent high-speed external memory for FPGA,The results show that this design improves faults diagnose and stability of fault recorder.
出处 《信息化研究》 2013年第3期10-13,共4页 INFORMATIZATION RESEARCH
关键词 故障录波 数字信号处理 现场可编程门阵列 智能变电站 高速 fault recorder DSP field-programmable gate array digital substation high-speed
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