基于RS485的数据通信协议的设计与实现

Design and implement of RS485 data communication protocol

基于现场可编程门阵列(FPGA),设计了采用RS485标准的数据通信协议。其中,高速信号接收,采用同步485通信协议,高速接口包括时钟和数据两个信号,时钟速率3.6864 MHz,利用同步时钟上升沿检测数据。低速信号接收采用异步485通信协议,波特率115.2 kbps,每字节1个起始位,8个数据位,1个截止位。针对高速数据接收时的情况,加入1 MB容量的静态存储器SRAM作为缓存,保证接收数据的可靠性。

Based on field programmable gate array（FPGA）,this paper designs RS485 communications protocol.To receive the high-speed data,it adopts the synchronous 485 communication protocol.The high-speed interfaces include clock and data,and the rate of clock is 3.6864MHZ.It detects data according to the rising edge of synchronous clock.To receive the low-speed data,it adopts the asynchronous 485 communication protocol whose rate is 115.2kbps.Each byte includes one beginning bit,eight data bits and one ending bit.The SRAM whose capacity is 1MB is used to be the cache to guarantee the reliability of data receivement.