期刊文献+

一种低功耗,高性能微处理器复位芯片的设计

A design of a low-power, high-performance microprocessor reset chip
下载PDF
导出
摘要 针对广泛使用电池供电的系统,由于电源电压监控的要求,系统复位电路的可靠性对整个系统的稳定性起着非常重要的作用,本文研究并设计一种低功耗,高性能的复位芯片,可以在系统上电,掉电的情况下向微处理器提供复位信号。当电源电压低于预设的门槛电压时,输出复位信号并在电源电压恢复到门槛电压以上继续持续复位一段时间,实现整个系统的平稳恢复,复位信号低电平有效。该芯片采用CMSC035标准CMOS工艺实现,采用Cadence Spectre仿真,工作电流仅为10μA。该芯片已成功应用于工业类控制系统中。 Considering the Widespread use of battery-powered systems,due to the requirements of the power supply voltage monitoring.The reliability of reset circuit plays a very important role in the stability of the entire system.Research and Design a low-power,high-performance rest chip,during the case of power on and power supply drops condition to provide a reset signal to the microprocessor.When the power supply voltage drops below a preset threshold voltage,Outputs a reset signal until the power supply voltage back to the threshold voltage then continue to persist for a period of time for the smooth recovery of the entire system.Active-Low reset signal.The chip using CMOS035 standard CMOS process,Use Cadence Spectre for Simulation,the operating current only 10uA.The chip has been successfully used in industrial control systems.
作者 吴桐 张涛
出处 《电子设计工程》 2013年第17期190-193,共4页 Electronic Design Engineering
关键词 复位芯片 带隙基准 振荡器 逻辑控制 reset chip bandgap reference oscillator logic control
  • 相关文献

参考文献7

  • 1陈力颖.CMOS低功耗电路设计[M].北京:科学出版社,2011:103-122.
  • 2张飞龙.开关电源的电压检测与控制[D].西安:电子科技大学.2010.
  • 3唐广.低温度系数高电源抑制比的基准源设计与应用[D].西安:电子科技大学,2010.
  • 4李杰,吴光林,吴建辉,戚韬.一种低失调CMOS比较器设计[J].电路与系统学报,2007,12(1):51-54. 被引量:5
  • 5包志华,景为平.3.75GHz 0.35μm CMOS1∶4静态分频器集成电路设计[J].南京邮电学院学报,2001,21(4):91-94. 被引量:2
  • 6张春华.CMOS亚阈值偏置恒流源的分析与设计[J].电子设计工程,2007,16(5):21-26.
  • 7康松默.CMOS数字集成电路[D].北京:电子工业出版社,2009:243-275.

二级参考文献12

  • 1Le H P,Zayegh A.Singh J.Performance analysis of optimised CMOS comparator[J].Electronics Letters,2003,39(11):833-835.
  • 2Neubauer H,Desel T,Hauer H.A successive approximation A/D converter with 16 bit 200 kS/s in 0.6μm CMOS using self calibration and low power techniques[A].The 8th IEEE International Conference on Electronics,Circuits and Systems[C].2001-09,2:859-862.
  • 3Razavi B,Wooley B.A.A 12-b 5-Msample/s two-step CMOS A/D converter[J].IEEE Journal of Solid-State Circuits,1992,27(12):1667-1678.
  • 4Razavi B,Wooley B A.Design techniques for high-speed,high-resolution comparators[J].IEEE Journal of Solid-State Circuits,1992,27(12):1916-1926.
  • 5James H Atherton,H Thomas Simmonds.An Offset Reduction Technique For Use with CMOS Integrated Comparators and Amplifiers[J].IEEE Journal of Solid-State Circuits,1992,27(8):1168-1175.
  • 6Behzad Razavi.Design of Analog CMOS Integraded Circuit.[M].International Editions,2000.470-477.
  • 7Philip E Allen,Douglas R Holberg.CMOS Analog Circuit Design(英文版)[M].电子工业出版社,2002-06.465-475.
  • 8Doernberg J,Gray P R,Hodges D A.A 10-bit 5-Msample/s CMOS two-step flash ADC[J].IEEE Journal of Solid-State Circuits,1989,24(2):241-249.
  • 9Bult K,Geelen G J G M.A fast-settling CMOS op amp for SC circuits with 90-dB DC gain[J].IEEE Journal of Solid-State Circuits,1990,25(6):1379-1384.
  • 10RAZAVI B.Design of high-speed, low-power frequency dividers and PLLs in Deep Submicron CMOS[].IEEE Journal of Solid State Circuits.1995

共引文献5

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部