基于AMBA-AHB总线的SDRAM控制器设计

Design of SDRAM controller based on AMBA-AHB bus

为了在嵌入式系统设计中实现对SDRAM存储器的访问,提出了一种基于AMBA-AHB总线规范的SDRAM控制器设计方案。首先简要介绍了AMBA总线规范,然后在完成整个存储控制器的整体框架设计的基础上给出了SDRAM控制器的实现原理以及详细的子模块划分。整个控制器的设计已用Verilog HDL语言实现并通过了Modelsim仿真和FPGA验证。仿真结果表明所设计的控制器符合SDRAM内部指令操作,并且满足了严格的时序要求。

In order to access the SDRAM storage in the design of embedded system, a design scheme of SDRAM controller based on AMBA-AHB bus specification is proposed. The AMBA bus specification is introduced simply, the implementation prin- ciple of SDRAM controller and the detailed sub-module division based on completing the design of the overall framework of the store controller. The entire SDRAM controller has been designed by using Verilog HDL language and adopted the Modelsim simulation and FPGA verification. The results show that this controller conform the operation of SDRAM internal instructions and meet the strict timing requirement.