摘要
在高杂波环境下工作的雷达系统要求大的瞬时动态范围,才能实现对弱目标信号的录取,迫切需要设计实现高动态范围的高速数据采集系统。研究了ADC芯片选型、时钟设计和前端电路设计对数据采集系统动态范围的影响,基于AD9650设计实现了一个16 b,65 MSPS的高速数据采集系统,用于实现对高杂波环境下雷达回波信号的采集。
Radar systems working in high clutter requires large instantaneous dynamic range to realize the capture of weak targets signals. As a result, a large dynamic range high-speed data acquisition system is desperately needed. The impact of selec- tion of ADC chips, design of the front-end circuit and the clock circuit on the dynamic range of the data acquisition system is studied. And a 16-hit, 65MSPS high-speed data acquisition system based on AD9650 is designed for the radar echo sisnals ac- quisition in high clutter environment.
出处
《现代电子技术》
2013年第19期160-163,166,共5页
Modern Electronics Technique
关键词
动态范围
时钟抖动
信噪比
无杂散动态范围
有效位
dynamic range
clock jitter
signal-to-noise ratio
spurious-free dynamic range
significance bit
