基于CPLD的高精度时间数字转换器的设计

Design of Accurate Time Digital Converter Based on CPLD

介绍了一种无盲区的高精度时间数字转换器的实现原理和设计方法,采用CPLD内部优化的门延迟线内插技术,实现了对时间的高分辨率测量;采用实时校准技术,保证了在不同温度和电压下的测量准确度。实验数据分析得出该设计能够达到250 ps的测量分辨率,不同工作环境下测量准确可靠。

This paper introduced the discipline and design method of a precise time digital converter without blind field.It used optimized gate-delay line embedded technique in internal part of CPLD achieved,the accurate measurement of time was achieved.The real-time adjustment guarantees the nicety in different temperatures and voltages.The experiment data shows that this method reaches the accuracy rate of 250 ps,and the measurement results in different environment are precise and reliable.