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基于硬件锁的多线程同步设计和实现 被引量:1

Design and Implementation of Synchronization for Multithreading Based on Hardware Locks
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摘要 硬件锁用简单的取数指令实现"取并加一"或"取并减一"的原子操作。首先介绍了通用多核多线程FT处理器实现的硬件锁机制,并和软件锁机制进行了比较,之后介绍了使用硬件锁机制实现多线程同步的方法,然后在GNU OpenMP运行库中设计并实现了利用硬件锁的多线程同步机制,最后采用典型OpenMP测试程序对使用硬件锁和使用软件锁的同步操作性能进行了评估和分析。 Hardware locks provide the atomic operation mechanism of "load and add one" or "load and subtract one" by simple load instructions. Firstly, we introduced the implementation of hardware locks in general purpose multi-core multi-threaded FT processors, and compared with the software lock mechanism, then described the method for synchro-nization of multi-threading using hardware locks. In the GNU OpenMP runtime library, we designed and implemented the synchronization mechanism based on hardware locks for FT processors. Finally, we evaluated the performance of typical OpenMP programs using hardware locks versus using software locks and gave some valuable analysis.
出处 《计算机科学》 CSCD 北大核心 2013年第9期35-37,60,共4页 Computer Science
基金 国家自然科学基金项目(61170046 61170045) 国家863计划项目(2012AA010903)资助
关键词 硬件锁 同步 FT处理器 GNU OpenMP运行库 Hardware locks, Synchronization, FT processor, GNU OpenMP runtimes
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参考文献7

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