基于FPGA图像压缩系统的研究与实现

Research and Implementation of Image Compression System Based on FPGA

提出利用5/3提升小波变换和零树小波编码对图像进行压缩编码的方案,并且基于改进算法的二维离散小波变换进行硬件设计,通过FPGA实现了设计的系统结构,并利用FPGA上的PowerPc核实现了EZW编码,最后通过仿真来验证了小波变换系统设计的正确以及对整个系统的性能评估。

Abstract The design schema of 5/3 lifting wavelet transform and Zero tree wavelet encoding are used to compress coding of image scheme. The hardware is designed based on the improved algorithm of the two-dimensional discrete wavelet transform. The design of system structure is realized through the FPGA, and EZW coding is realized by using the FPGA on PowerPC core. At last, by simulation to verify the correct of wavelet transform to system design and performance evaluation of the whole system.