FPGA硬件抽象层的路由配置设计与实现

Routing Configuration Design and Implementation for Hardware Abstraction Layer in FPGA

设计了一种FPGA软件无线电硬件抽象层数据路由的配置方案,该方案采用模块化控制的思想实现了数据路由配置与数据请求仲裁,同时降低了数据传输的时延,这对于软件无线电硬件抽象层的数据传输有着重要的意义。最后,针对该设计方案进行了仿真测试,测试结果表明此设计方案是行之有效的,能够很好地满足FPGA硬件抽象层路由配置的要求,同时方案结构简单,便于工程实现。

the HAL for FPGA is designed with the modular software design concept. Data routing table configuration and data request arbiter are implemented, by this method, data transfer delay is decreased compared with traditional way. Finally, an emulator is built based on the design. The performance test results show that the design can work well in use, and the scheme proposed here can well satisfy the requirement of HAL. What＇ s more,the scheme is simple for implementation and the overhead is low.