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Quick System-Level DDR3 Signal Integrity Simulation Research 被引量:2

Quick System-Level DDR3 Signal Integrity Simulation Research
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摘要 Double data rate synchronous dynamic random access memory (DDR3) has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integrity (SI) simulation flow for the DDR3 interface, two system-level SI simulation methodologies, which are board-level S-parameter extraction in the frequency-domain and system-level simulation assumptions in the time domain, are introduced in this paper. By comparing the flow of Speed2000 and PowerSI/Hspice, PowerSI is chosen for the printed circuit board (PCB) board-level S-parameter extraction, while Tektronix oscilloscope (TDS7404) is used for the DDR3 waveform measurement. The lab measurement shows good agreement between simulation and measurement. The study shows that the combination of PowerSI and Hspice is recommended for quick system-level DDR3 SI simulation. Abstract---Double data rate synchronous dynamic random access memory (DDR3) has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integrity (SI) simulation flow for the DDR3 interface, two system-level SI simulation methodologies, which are board-level S-parameter extraction in the frequency-domain and system-level simulation assumptions in the time domain, are introduced in this paper. By comparing the flow of Speed2000 and PowerSI/Hspice, PowerSI is chosen for the printed circuit board (PCB) board-level S-parameter extraction, while Tektronix oscilloscope (TDS7404) is used for the DDR3 waveform measurement. The lab measurement shows good agreement between simulation and measurement. The study shows that the combination of PowerSI and Hspice is recommended for quick system-level DDR3 SI simulation.
出处 《Journal of Electronic Science and Technology》 CAS 2013年第3期286-290,共5页 电子科技学刊(英文版)
基金 supported by the National Natural Science Foundation of China under Grant No.61161001
关键词 Index Terms--Double data rate synchronousdynamic random access memory HSPICE PowerSI signal integrity system-level signal integrity simulation. Index Terms--Double data rate synchronousdynamic random access memory, Hspice, PowerSI,signal integrity, system-level signal integrity simulation.
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同被引文献11

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  • 9张刚,贾建超,赵龙.基于FPGA的DDR3 SDRAM控制器设计及实现[J].电子科技,2014,27(1):70-73. 被引量:23
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