基于FPGA的高速USB2.0数据采集系统主控电路设计

Control circuit design of high speed USB data acquisition system based on FPGA

为了满足对较高速度动态信号的实时记录采集的要求,设计和实现了一个基于FPGA和USB2.0接口的14bit、65MHz高速数据采样系统。本系统以FPGA为数字信号处理核心,通过FPGA对采集系统的有效控制,实现数据的串并转换、AD接口数据FIFO缓存、SDRAM数据存储读取及系统显示等功能,并在系统控制下通过USB2.0总线通讯接口实现了数据和上位机之间的高速交互。本系统已完成相关设计并通过验收,并成功地应用到型号工程中。

In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.