摘要
随着动态随机存取存储器(内存)线宽的缩小,需要半球状多晶硅等新技术来增大电容。当前对选择性半球状多晶硅论述较多,非选择性半球状多晶硅则较少提到。文中讲述的是炉管非选择性半球状多晶硅在0.13μm堆叠式内存上的实际应用,侧重于解决片数效应。炉管非选择性半球状多晶硅的下电极阻值具有非常严重的片数效应,电容的下极板电阻从炉管底部向上增高,并随着产品片数的增加而增高,导致上部产品良率偏低,一个制程只能生产一批产品。通过对非选择性半球状多晶硅的制程原理及硬件构造进行分析,发现片数效应是由于籽晶沉积阶段的硅烷流量通常非常小,只有10~15标准毫升,它在硅片上的分布密度会随着产品的增多而沿气流方向减少,沿气流方向的硅片只好通过增加籽晶和迁移步骤的温度来拉起更多的基体硅进入半球体,相应的剩余基体硅就会变薄,这就导致了下电极阻值的增高。文章根据该发现,提出了炉管非选择性半球状多晶硅片数效应的解决方法。
Because advanced DRAM technology continue to shrink the cell area, capacitance enhancement technology such as hemispherical grain polysilicon need to be applied. There are many papers to study selective hemispherical grain polysilicon, but the papers of batch type non-selective Hemispherical grain polysilicon are few. This paper mainly solves batch type non-selective hemispherical grain polysilicon loading effect issue for 0.13 gm stacked DRAM mass production. The electrode resistance trends up along with batch size increasing. The wafer yield drops remarkably if the batch size is over 25 pieces. From hardware and experiment data analysis, this paper finds the seeding silane flow is the root cause. It is too small to cover the full boat along with product surface increasing. Based on the finding, this paper summary the solution of the loading effect of batch type non-selective hemispherical grain polysilicon for mass production.
出处
《电子与封装》
2013年第10期44-48,共5页
Electronics & Packaging
关键词
炉管
堆叠式内存
非选择性半球状多晶硅
片数效应
furnace
stacked DRAM
non-selective hemispherical grained polysilicon
loading effect