摘要
介绍一种采用新型可编程逻辑器件 CPLD和“先入先出”的大容量存储芯片 FIFO设计的高速数据采集系统 ,及通过计算机打印口 (并行口 )实现采集数据与计算机间通讯 ,并简要介绍了
We described a high speed acquisition system with using programmable logic device CPLD and ‘first in first out’memory chip(FIFO) which communicate between the PC's LPT and DAQ, and also gave a brief description of PC′s LPT.
出处
《内蒙古大学学报(自然科学版)》
CAS
CSCD
2000年第6期628-631,共4页
Journal of Inner Mongolia University:Natural Science Edition