高阻衬底CMOS外延工艺研究

Research on High Resistance Substrate CMOS Epitaxial Process

针对于高阻衬底、高阻外延工艺与常规CMOS工艺的兼容性进行研究,主要讨论了CMOS外延工艺中确定有效外延层厚度的实验过程。

This paper describes the research on the compatibility of high resistance substrate for high resistance epitaxial process and the conventional CMOS process.It mainly discusses the experimental process for the determination of effective thickness of epitaxial layers in the process of CMOS epitaxial.