摘要
以FPGA为核心,提出了一低通40阶线性相位FIR滤波器的硬件设计方案,利用分布式DA算法优化查找表LUT来简化乘法运算,降低了硬件成本;同时以MATLAB强大的运算能力为辅助,对滤波器系数设计初期和LUT进行验证和仿真,极大地降低了系统设计的复杂度,最终实现了低成本、高可靠性的数字滤波系统设计。
A design scheme to realize a 40 orders FIR filter based on FPGA was introdaced.Here we focus on the optimal design of the Distributed Algorithmand for LUT(Look Up Table) to simplify multiplying.Necessary verification and simulation have been done to check the design using MATLAB to supports aided design which also help to get the filtering coefficient and LUT data in the early stage.Finally,the proposed FIR filter design are achieved with the advantages of low cost,flexibility and high reliability.
出处
《科学技术与工程》
北大核心
2013年第29期8769-8774,共6页
Science Technology and Engineering
基金
国家自然科学基金(61076111)资助