面向数字助听器的低功耗ASIP设计

Low Power ASIP Design for Digital Hearing Aids

数字助听器系统因具有便携性对功耗要求严格,同时功能的不断改进与增加,需要设计提供良好的灵活性与计算性能,而ASIC的设计不够灵活,GPP的设计通常不满足系统对功耗的需求.专用指令集处理器(ASIP)具有较好的性能、较低的功耗、较高的灵活性,通过分析数字助听器算法,添加专用指令与加速单元,在设计的各个阶段综合利用软硬件的低功耗设计方法,ASIP可以很好地满足数字助听器系统对设计低功耗以及灵活性的设计需求.设计基于TSMC 130 mm工艺进行了流片,当系统工作在8 MHz时钟频率、1.2 V工作电压时,处理器功耗约0.963 mW.

Digital hearing aid as a portable product requires low power consumption . With the continuous improvement and increase of functionality , the design should also offers great flexibility and high computing performance .ASIC solution lacks flexibility .GPP solution may not meet the requirement of power consumption . Application Specific Instruction Set Processor （ASIP ） can offer higher computing performance , lower power consumption and greater flexibility . Through analyzing the algorithm of digital hearing aid system ,customized instruction set extensions and dedicated hardware accelerators were added .Several software and hardware power optimization techniques were also adopted at the various levels of the design .The optimized ASIP can meet the low power consumption and high flexibility requirements of digital hearing aid system well .The ASIP design for digital hearing aids was implemented in TSMC 130 nm process .When the system works at 8 M Hz clock frequency ,the power dissipation is 0 .963 mW at 1 .2 V supply voltage .