基于Proteus简易逻辑分析仪设计与实现

Simple Logic Analyzer Design and Implementation Based on Proteus

本文介绍了一种基于Proteus简易逻辑分析仪开发过程,电路主要包括时钟脉冲和多路标准信号产生器电路、多路脉冲分配器电路、多路电子模拟开关电路、直流叠加电路四个部分,并对设计电路利用Proteus软件进行仿真调试,结果显示在同一屏幕上能同时显示四路稳定波形,实现逻辑分析仪功能。

A simple logic analyzer development process is introduced based on Proteus. The pulse and muhichannel standard signal generator circuit,muhichannel pulse divider circuit, circuit mainly comprises clock multichannel electronic analog switch circuit and DC superposition circuit.With Proteus software simulating and debugging.the results show the circuit can display four way stable waveforms on the same screen and realize the logic analyzer function.