一种4路内插CORDIC的14位吉赫兹DDS IP核

4-channel-interpolated 14-bit high speed CORDIC DDS IP core

直接数字频率合成器由于具有快速的频率转换时间和极高的频率分辨率,已得到了广泛的应用,但输出带宽较窄和杂散抑制较差一直是制约直接数字频率合成器输出信号质量的关键因素.基于改进的CORDIC相位幅度映射技术,采用4级流水线结构的相位累加器,设计了一种4路内插CORDIC结构的14位高速直接数字频率合成器IP核.与传统单路CORDIC结构相比,时钟采样频率是原来的4倍,能有效提高输出信号的无杂散动态范围,并降低电路的复杂度和面积.验证结果表明,当采样时钟频率为1GHz、频率分辨率为0.23Hz、输出频率为82MHz时,无杂散动态范围为86.7dBc,基于0.18μm 1P6M CMOS工艺所实现的IP核有效面积为1.33mm2,能嵌入式应用于高精度宽频雷达、通讯系统的系统芯片.

The direct digital frequency synthesizer （DDS） has been widely used because of the advantages of less frequency hopping time and fine frequency discrimination. But the disadvantages of narrowband and poor SFDR performance limit the quality of the DDS output signal. Based on the improved phase to sine- amplitude mappng technology, this paper presents a 4-channel-interpolated 14-bit high speed CORDIC DDS IP core with a 4-stage pipelined phase accumulator. Compared with the traditional CORDIC structure, the sample rate is four times higher, and the complexity and area of the circuit are reduced. The test results indicate that when the sample clock frequency is 1 GHz and the frequency resolution is 0.23 Hz, the output frequency is 82 MHz with a SFDR of 86.7 dB. Based on the 0.18 tim 1P6M CMOS process, the effective area of the IP core is 1.33 mm2 . The DDS presented in this paper can be used in system chips of the high accuracy wide band radar and communication system as embedded application.