基于有限状态机的硬件木马设计和插入（英文）

Design and Insertion of Hardware Trojan Based on Finite State Machine

针对集成电路设计和制造中存在的硬件木马问题,提出一种新的模型来提高木马检测能力。该模型基于有限状态机,比组合电路型木马难于触发和检测。同时,木马电路插入位置的选择也可以有效规避路径延时检测方法。实验选择ISCAS’89基准电路中的S349作为目标电路,对功能和延时信息进行仿真。实验结果表明,这种类型的木马难于激活,并且选择合适的插入位置可以有效隐藏延时信息。

According to the hardware Trojans inserted during design and fabrication, the authors provide a new model of Trojan. New model is based on a finite state machine which is more difficult to trigger and detect than those based on combinational circuits. Also, the locations in target circuits to insert Trojans are considered to avoid being detected using path delay fingerprint method. $349 circuit from ISCAS＇89 benchmark circuits is chosen as the target circuit. Functional simulations are performed and delay information is simulated. The results show that this type of hardware Trojan is difficult to activate and the insertion method is effective to hide delay information.