PDN电源地平面去耦电容网络设计

Decoupling capacitor networks design on PDN power ground planes

提出根据工作频段的不同分层设计去耦电容网络的思想,给出电容器去耦原理和计算方法,分析过孔和引出线等不同封装方法对去耦电容阻抗的影响。利用目标阻抗法进行10 MHz^1 GHz的频带范围内PDN的端口阻抗设计,运用目标阻抗值和自谐振点确定去耦电容的种类、型号和数目。利用Ansoft SIwave工具对所设计的去耦电容网络去耦效果进行仿真模拟。仿真结果表明:电源地平面在高频下需要的电容阻抗很小,高频段的电容阻抗比低频段电容阻抗低一个数量级,但需要的去耦电容数目多达上百个。

To design the decoupling capacitors network according to the hierarchical division, the decoupling principle and computing method were proposed. Meanwhile, the effects of different packings such as vias and traces on the impedance of decoupling capacitors were analyzed. The port impedance of PDN in the frequency range from 10 MHz to 1 GHz was designed with the target impedance method, and the type, model and number of the decoupling capacitors were chosen according to the method and self-resonant frequency of each capacitor. The processing and decoupling effects of the designed decoupling capacitors network were simulated in Ansoft Slwave. The simulation results show that the imperidance of capacitor rieeded among Power and plane structure was small. In high frequency, the impedance of capacitor was reduced an order of magnitude compared with the low frequency, but the quantity raised to hundreds or even more.