基于FPGA的节日时钟倒计时控制系统设计

The Holiday Countdown Clock Controlled System Based on FPGA

该节日时钟倒计时控制系统是以FPGA芯片EP2C5Q208C8为核心器件组成的一个倒计时系统,与传统门电路相比,受到的外界干扰较小,并且擦除后FPGA恢复成白片,内部逻辑关系消失,因此,FPGA能够反复使用。整个系统利用QuartusⅡ11.0软件设计、编译、仿真,最后将程序写入FPGA黑金开发板(DB2C5),实现时钟倒计时控制与显示。

The holiday countdown clock controlled system is composed of EP2C5Q208C8 as a core part of the countdown system. Compared with the traditional gate circuit, less disturbed by the outside, and erased, FPGA restore white film, disappear, the internal logic relations therefore, FPGA can be used repeatedly. We design, compile, simulation on Quartus Ⅱ 11.0 board . So we get the holiday countdown software. And then the program is clock controlled system. written to the FPGA HEIJIN （DB2C5）