具有埋界面漏的Trench功率MOSFET研究

Research on Trench Power MOSFET With Buried-interface-drain

研究了两种具有埋界面漏的槽型技术(Trench)功率金属氧化层半导体场效晶体管(MOSFET)。利用埋于整个界面的漏n^+层缩短开态时载流子在高电阻率n^-漂移区的运动路径,从而降低器件比导通电阻,缓解功率MOSFET器件比导通电阻与击穿电压之间的矛盾。详细研究了器件结构参数对比导通电阻和击穿电压的影响。器件1为50~70 V级器件;器件2利用p型硅条增强降低表面电场(RESURF)效应及优化体内电场分布,使得器件性能进一步提高,在133 V的击穿电压时获得0.85 mΩ·cm^2的低比导通电阻。

Two trench power metal-oxide-semiconductor field-effect transistors （MOSFET） with buried-interface-drain are studied.The buried-interface-drain n~ region shortens the motion-path in the high-resistance n- drift region for the car- riers, and exhibits a lower specific on-resistance.Power MOSFET＇s tradeoff between the breakdown voltage and specif- ic on-resistance is relieved.The influences of structure parameters on the device performances are investigated.Devicel is 50-70 V class, p-type silicon of device2 inserted between the n- drift region and oxide-filled trench leads to an en- hanced reduced surface field（RESURF） effect and optimizes the distribution of the bulk electric field.An uhralow specific on-resistance of 0.85 mΩ. cm2 is obtained with a breakdown voltage of 133 V for device2.