基于进位链的多通道时间数字转换器

Carry chain based multi-channel time-to-digital converter

时间数字化技术广泛应用于现代大型物理实验和核医学仪器等领域。该文介绍了基于现场可编程门阵列(FPGA)进位链结构的时间数字转换器(TDC)的设计,研究了器件进位链结构、内核电压和环境温度对TDC精度的影响,并设计了独立的自标定机制。使用该方法在低成本的Cyclone II系列FPGA上实现了32通道时间数字转换模块。测试结果表明:各通道TDC的性能一致,达到了25ps(均方根)的测量精度,信号周期和脉宽的测量精度分别好于35ps和45ps。该设计具有高密度、高精度和低成本的特点,可以满足大多数时间测量应用需求。

Time digitizing is widely used in modem physics experiments, nuclear medical instruments and other fields. A field-programmable gate array （FPGA） carry chain based time-to-digital converter （TDC） is developed after studies of the influence of carry chain structure, core voltage and temperature on the resolution. A self-calibration unit is also designed. This study implements a 32-channel TDC module with a low-cost Cyclone II FPGA. Tests show a measurement resolution of 25 ps （root mean square, RMS）, period width measurements better than 35 ps and pulse width measurements better than 45 ps for multiple channels. This design is applicable to most time measurement applications due to its high density, high resolution and low cost.