摘要
以直接数字频率合成技术为核心的宽带扫频信号源已成为近年来的研究热点。详细分析了数字频率合成芯片AD9854在Ramped FSK工作模式下的扫频信号输出原理,并以Altera公司CycloneIII EP3C10E144C8NFPGA为主控芯片,组建外围电路,利用QuartusII开发工具以及VHDL语言编写控制逻辑,实现了扫频范围为0~90MHz的扫频源系统。测试结果表明：该系统扫频步进30Hz,时间步进1.6μs,并可实现非线性频率扫描,系统性能达到了分布式光纤布里渊传感测量系统对扫频源的要求。
The design of broadband frequency-sweep signal source based on direct digital synthesis（DDS）technology has been a focus of research in recent years.This paper introduces the basic theory of DDS and analyses detailedly principle of frequency sweep signal output of DDS chip AD9854in Ramped FSK mode.CycloneIII EP3C10E144C8NFPGA of Altera Corporation is used as the main control chip,and its periphery circuit is built.By the QuartusII development tools and VHDL,controlling logic programs of broadband frequency-sweep source system are designed and compiled.Test results show that the frequency sweep range is 0to 90MHz,and the system minimum sweep step is 30Hz,time step is 1.6μs. In addition,nonlinear frequency scanning is realized according to the actual needs.The system＇s performance reaches the requirements in distributed fiber Brillouin sensor measurement system.
出处
《国外电子测量技术》
2013年第11期65-69,共5页
Foreign Electronic Measurement Technology
