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基于自动增益控制(AGC)的高效率LED驱动芯片设计

Design of the High-efficiency LED Driving Circuit Based on Automatic Gain Control(AGC)
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摘要 设计了一款具有高效率的发光二级管(LED)驱动芯片,采用自动增益控制(AGC)原理,通过内部的峰值电压检测和自动增益调节反馈控制机制,实现幅值稳定、相位相同的正弦包络电压输出,为原边电感电流控制提供比较阀值电压,实现脉宽调制(PWM)耦合的负载恒流输出,进而提高LED发光效率.芯片的工作电压适合于宽电压范围,在交流85~265 V范围内,输出表现了良好的恒流特性,实现高达95%以上的功率因数(PF)值,LED的工作效率达80%以上. A high-efficiency chip of LED driver is designed. It is got a constant current output of PWM modulate, through technology of the control mechanisms of internal peak voltage detection and the automatic gain adjustment, to achieve a stable amplitude and the same phase sinusoidal envelope voltage output, which supply the comparison threshold voltage for primary side inductor current con- trol by principle of the automatic gain control (AGC). The operating voltage of the chip is suitable for wide voltage range applica- tions,the output performance of the constant current characteristic has a PF value up to 95 ~, LED work efficiency more than 80 %, within the range of 85 V to 265 V.
出处 《厦门大学学报(自然科学版)》 CAS CSCD 北大核心 2013年第6期787-790,共4页 Journal of Xiamen University:Natural Science
关键词 自动增益控制 功率因数校正 发光二极管(LED)驱动芯片 电阻网络 automatic gain control power factor correction LED resistor network
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参考文献7

  • 1Yu W,Lai J S,Ma H. High-efficiency DC-DC converter with twin bus for dimmable LED lighting[J].IEEE Transactions on Power Electronics,2011,(08):2095-2100.
  • 2耿云辉,冯西安,张路,肖璐.一种大动态范围AGC电路的设计与实现[J].微处理机,2012,33(3):20-23. 被引量:16
  • 3Kazerani M,Ziogas P D,Joos G. A novel active current waveshaping technique for solid-state input power factor conditioners[J].IEEE Transactions on Industrial Electronics,1991,(01):72-78.doi:10.1109/41.103488.
  • 4Razavi B.Design of analog CMOS integrated circuits[M]北京:清华大学出版社,2005.
  • 5郭建刚,邬齐荣,龚敏,孙杰,陈昶.一种自适应峰值检测电路的设计[J].四川大学学报(自然科学版),2011,48(3):571-576. 被引量:5
  • 6谭志中,赵素英.N阶电阻网络等效电阻的研究[J].河北师范大学学报(自然科学版),2004,28(2):149-154. 被引量:33
  • 7何乐年;王忆.模拟集成电路设计与仿真[M]北京:科学出版社,2008.

二级参考文献18

  • 1王开贤,邬齐荣,高鑫,李美光,汤恩松,Kai-Xian,Qi-Rong,Mei-Guang,En-Song.高精度轨对轨CMOS峰值检测电路设计[J].四川大学学报(自然科学版),2009,46(6):1702-1708. 被引量:2
  • 2易先军,叶春生.基于FPGA的高速数字峰值保持器设计[J].计量技术,2005(9):26-28. 被引量:1
  • 3郑晓燕,王江,仇玉林.低电压低功耗CMOS采样保持电路[J].电子器件,2006,29(2):318-321. 被引量:3
  • 4Danchiv A,Bodea M,Dan C.Total transconductance optimization for a rail to rail amplifier[M].Brasov:OPTIM,2008.
  • 5Dinc H,chuang S,Allen P E et al.Paul Hasler.A rail to rail slew-boosted pre-charge buffer[M].Island of Kos:ISCAS,2006.
  • 6Abed K H,Nerurkar S B.High speed flash analogto-digital converter[M].Covington KY:MWSCAS,2005.
  • 7Chow H C,Hor Z H.A high performance peak detector sample and hold circuit for detecting power supply noise[M].Macao:APCCAS,2008.
  • 8Seok-Bae P R,Wilson J E,Mohammed I.The chip peak detectors for multistandard wireless receivers[J].Circuits & Devices Magazine,IEEE,2006,22(6):6.
  • 9Chang P Y,Chou H P.A high precision peak detect sample and hold circuit[M].San Diego:NSSCR,2006.
  • 10赵志刚.舷侧阵主、被动自导实验系统的硬件设计[D].西安:西北工业大学,2009.

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