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雷达接收机故障检测训练系统设计

Design and Research on the Fault Diagnosis Training System of Radar Receiver
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摘要 设计了一种雷达接收机离线故障检测仿真训练的系统。该系统使用嵌入式微处理器作为系统的控制中心,结合大规模集成电路FPGA以及高频调理放大电路,可产生模拟雷达中频回波信号和调制信号,使雷达接收机各模块在仿真环境中工作,以便于进行故障检测分析和训练。该系统应用于雷达实验中心,提高了雷达故障检测训练的效率和质量。 The paper designs a system for radar receiver off-line fault detection simulation training. The system uses embedded micro- processor as the control center of the system, combining with the large scale integrated circuit FPGA and high frequency processing circuit, can generate simulated radar IF echo signal and the modulation signal, and make the radar receiver of each module work in the simulation en vironment, in order to carry on fault detection analysis and training conveniently. The system has been applied in the radar experiment cen- ter, which has improved the efficiency and quality of radar fault detection traininl~.
机构地区 海军工程大学
出处 《舰船电子工程》 2013年第11期62-64,共3页 Ship Electronic Engineering
关键词 雷达接收机 故障检测 嵌入式微处理器 FPGA radar receiver, fault diagnosis, single-chip microcomputer, FPGA
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