TFT-LCD网点Mura的研究和改善

Research and Improvement of TFT-LCD Node Mura

为解决116.8cm(46in)广视角边缘场切换技术4mask面板生产中的阵列工艺中,发生的一种网点色斑缺陷,应用扫描电子显微镜、聚焦离子束、能谱仪、宏观微观观测仪和线宽测量仪等检测设备进行Mura及其结晶物成份分析,比较了TFT膜厚;进行了GI和PVX膜玻璃正反面1%HF酸腐蚀试验、下部电极温度升高10℃试验、工艺ash、n+刻蚀的后处理步骤和有源层BT试验。研究了沟道n+掺杂a-Si层的厚度对于Mura的影响。确定了Mura的发生源和影响因素,结果发现Mura形成机理,一为基板背部划伤,二为接触和不接触电极区域的温差异,三是刻蚀反应的生成物在有源层工艺黏附在基板背部,之后经过多层膜沉积、湿刻和干刻、剥离工艺后促使缺陷进一步放大。最后采用平板粗糙面下部电极、控制剩余a-Si厚度和升高温度的方法,消除了网点Mura,并使得整体Mura发生率降为0.08%。

To resolve a kind of node Mura of 116.8 cm（46 in） Fringe Field Switching panel in array actual 4mask etching process,scanning electron microscopy,focused ion beam,energy dispersive spectroscopy Macro/Micro and critical dimension are used to verify the compositions and crystals. Also GI test,PVX layer＇s front and backside in 1% HF corrosion experiment, elevating 10℃ in lower electrode,varying ash and AT（after treatment）of n＋ step and active BT conditions are carried out. In addition, the effect of the n＋ doped a-Si thickness is studied. So the Mura sources, influencing factors and the Mura mechanism are revealed：First factor is its first formation on the substrate back scratch,the other is the film changes between contact and non-contact electrode layer etching regional in temperature changes, the third is by-products adhesion to the substrate backside in active layer dry etch, followed by a multi-layer film deposition and amplified after wet etch-strip process. Finally the flat and rough lower electrode is adopted,remaining a-Si thickness is restricted between 210 nm and 230 nm, and temperature is elevated to 50℃,then node Mura has not been found and the overall Mura ratio is less than 0.08%.