基于FPGA控制的NAND Flash存储设计

Design of NAND Flash Memory Circuit Based on FPGA Control

为实现大容量存储电路的设计,以FPGA作为控制核心,Flash作为存储芯片,采用组合指令的设计方法,提高控制指令的可靠性,并对其进行有限状态机检测,最大限度防止无效指令;针对存储芯片坏块问题,建立一种快速实时更新的无效块地址列表,将所有无效块地址存储在FPGA内部RAM中,通过地址对比,实现数据的可靠存储。该设计具有一定的通用性,可以扩展到所有类似Flash存储系统中,对其他的电路具有一定的借鉴意义。

For the realization of large-capacity storage circuit design,taking FPGA as the control core,Flash as the memory chip,using a combination of instruction to improve the reliability of the control instruction,a finite state machine detection to realize a maximum protection against invalid instruction ; A fast real-time update invalid block address list is established for the bad block of memory chips,and all invalid block address is stored in RAM within the FPGA,through Address comparison to realize the data storage reliable.This design has a certain degree of versatility and can be extended to all similar Flash storage system,and also has a certain referenced significance to other circuit.