摘要
基于计数器的延时电路是激光测距仪器模拟检测常用的延时器,但其启动信号与首计数脉冲之间往往存在小于一个计数时钟周期的偏差,提出一种基于可编程逻辑阵列(FPGA)的补偿方法对该偏差进行补偿。该方法利用FPGA内部的进位延迟线实现时间-数字转换电路,可精确测量计数器启动信号与首计数脉冲间的时间偏差,分辨精度可以达到80ps。该时间偏差转化为模拟距离偏差值用于对计数器延时效果进行补偿,大大提高了延时时间模拟空间距离的精度,增强了对激光测距仪器的模拟检测能力。
The simulated testing method of laser ranging finders commonly uses counter based delay circuit as the delay unit, whereas there is always a deviation of the time counter start- ing signal and the first counting pulse. This deviation is shorter than a pulse width, affecting the accuracy of the delay time. A compensation approach based on Field Programmable Gate Array (FPGA) is composed. The approach introduces carry--chain in FPGA to implement a time to digital converter, which has the ability to measure the deviation of the counter starting signal and the first counting pulse. The resolution accuracy can reach 80 ps. The corresponding distance of the measured deviation can be compensated to the preset simulated distance, thus the simulated distance is made more accurate. The accuracy of the simulated distance by delay time is greatly improved and the testing capability of laser ranging finders is enhanced by the approach.
出处
《光电子技术》
CAS
北大核心
2013年第4期226-229,共4页
Optoelectronic Technology
基金
总装科技创新人才团队资助基金(XXXX20090515)
关键词
模拟检测
激光测距
计数器
时间数字转换器
simulated testing, laser ranging, counter, time to digital converter